The International Technology Roadmap for Semiconductors has projected significant improvements in prime wafer Nano-topology and flatness requirements.
We have developed technology for grinding wire-sawn and etched Silicon wafers while generating ultra-low, sub-surface damage and very low surface roughness, reducing the amount of final polishing. This provides the benefits of increasing wafer yield while improving the cost of ownership. In addition, we have also developed specialized wheels for SOI wafers to improve process yield.
Reach out to us to customize your output finish requirements for single side or double side grinding applications.